1. Field of the Invention
The present invention relates to an encoding circuit, an encoding method, a digital signal transmitting apparatus, and a digital signal recording/reproducing apparatus.
2. Description of the Related Art
Trellis coded partial response method is an effective method as a signal processing method so as to record a digital signal in a high density to some recording medium, such as a magnetic medium. The Trellis coded partial response method is a combination of a partial response and a maximum-likelihood decoding process, that is performed with a restriction condition of a modulation code.
Extended partial response class 4 (referred to as EPR4) has been conventionally used as a partial response. In EPR4, an equalized waveform of a di-pulse response is expressed as (1, 1, xe2x88x921, xe2x88x921) at a sample point (symbol point). The system polynomial of EPR4 is expressed as Formula (1).
G(D)=(1xe2x88x92D)(1+D)2xe2x80x83xe2x80x83(1)
where D is a one-bit delay operator.
Next, trellis coded extended partial response class 4 (hereinafter referred to as TCEPR4) will be described. TCEPR4 is used to perform the maximum-likelihood decoding process using EPR4 and a restriction condition of a modulation code. FIG. 1 shows an example of the structure of a circuit that performs TCEPR4. Input data I to be recorded is supplied to an encoder 201. The encoder 201 performs a predetermined encoding process for the input data I and outputs encoded data CO. The encoded data CO is supplied to a magnetic recording channel 202.
A circuit that converts input data into binary data is disposed upstream of the encoder 201. The input data I is binary data. The magnetic recording channel 202 contains a recording circuit, a recording magnetic head, a magnetic record medium, a reproducing head, and a reproducing circuit. The recording circuit processes the encoded data CO so as to record the input data I to the magnetic record medium. In other words, the magnetic recording channel 202 is a portion that writes/records data to/from the magnetic record medium.
An equalizer 203 equalizes a signal reproduced from the magnetic record medium through the magnetic recording channel 202. An output signal of the equalizer 203 is supplied to a maximum-likelihood decoder 204. The maximum-likelihood decoder 204 performs a maximum-likelihood decoding process for the output signal of the equalizer 203. A decoder 205 disposed downstream of the maximum-likelihood decoder 204 finally reproduces information recorded on the magnetic record medium. In reality, after a digital process is performed for sampled data that has been A/D converted, a reproducing process is performed downstream of the magnetic recording channel 202.
An output signal of the equalizer 203 (namely, a signal that has been reproduced and equalized by the magnetic recording channel 202) (this output signal is hereinafter referred to as a reproduced/equalized signal) has five levels of (xe2x88x922, xe2x88x921, 0, +1, and +2). FIG. 2 shows an example of the reproduced/equalized signal. To restore the reproduced/equalized signal into binary data (namely, the encoded data that has not been recorded/reproduced by the magnetic recording channel 202), Viterbi decoding process that is one kind of maximum-likelihood decoding process is used.
In the Viterbi decoding process, the maximum-likelihood sequence (path) is estimated as reproduced encoded data based on a result of a calculating process with available sequences of sampled data. Thus, the Viterbi decoding process has a high detecting performance. However, depending on a sequence of the reproduced/equalized signal, the maximum-likelihood sequence may not be easily settled corresponding to the results of the above-described calculating process. In this case, the calculated results are stored in a memory of the Viterbi decoder until the maximum-likelihood sequence is settled. Thus, if the length of an unsettled sequence (namely, the length of a sequence that is calculated until the maximum-likelihood sequence is settled) exceeds the memory length, the memory overflows and thereby an error takes place.
As an example of which the memory overflows, a maximum-likelihood sequence estimated from some types of sequences of values of a reproduced/equalized signal is not eternally settled. Such a sequence is referred to as quasi catastrophic sequence. In addition, before a sequence is settled as the maximum-likelihood sequence, if the length of an unsettled sequence exceeds the memory length, the memory overflows. Thus, when the quasi catastrophic sequence is removed and the length of an unsettled sequence is limited to the memory length, the memory can be prevented from overflowing.
An object of the channel encoding process is to trim a signal spectrum and limit the number of successive xe2x80x9c0sxe2x80x9d so as to improve the accuracy for extracting clock information. Another object of the channel encoding process is to prevent the memory from overflowing.
In recording/reproducing mode, the channel encoding process is performed in the following manner. Binary data to be recorded (hereinafter referred to as information word) is converted into binary data (hereinafter referred to as record word) corresponding to a predetermined conversion rule. The record word is recorded/reproduced to/from the magnetic recording channel 202. In the reproducing mode, data that has been decoded by the above-described maximum-likelihood decoding process is inversely converted and the original information word is reproduced. (When there is no encoded error, the data decoded by the maximum-likelihood decoding process matches the record word).
In FIG. 1, the information word is I and the record word is CO. The predetermined conversion rule is an encoding rule performed by the encoder 201. In the reproducing system, the decoder 205 performs a decoding process as an inversely converting process for data that has been decoded by the maximum-likelihood decoder 204 and thereby reproduces the original information word.
On the other hand, since the system polynomial of TCEPR4 is expressed as Formula (1), the transfer function of the TCEPR4 channel is a spectrum of which the Nyquist frequency is null. When data is encoded, a code conversion is performed in such a manner that the frequency component of the Nyquist frequency in the power spectrum density of the record current of which xe2x80x9c1xe2x80x9d and xe2x80x9c0xe2x80x9d of a code word sequence are recorded corresponding to the direction of the current becomes null. At the frequency of which the frequency component of the transfer function of the channel is null, data is encoded in such a manner that the frequency component of the power spectrum density of the code word sequence becomes null. Thus, the signal detection gain of decoded data can be improved.
To prevent the memory from overflowing in the Viterbi decoding process and improve the signal detection gain, the following encoding process is performed. In other words, by limiting the range of the variation of ADS (Alternating Digital Sum), data can be encoded in such a manner that the Nyquist frequency component becomes null. In TCEPR4, a code word that satisfies the limitation of the range of the variation of the ADS is used.
Assuming that the total number of bits of the input binary data is denoted by n, the ADS of a sequence {a1, . . . , an} is expressed as Formula (2).                     ADS        =                              ∑                          i              =              1                        n                    ⁢                      (                          -              1                        )                                              (        2        )            
For example, when data is encoded corresponding to an encoding state transition chart shown in FIG. 3, a code word sequence of which the range of the variation of the ADS is limited to up to eight is generated. Under such a limitation, the square of the minimum Euclidean distance between sequences that are output from the TCEPR4 channel becomes six. Thus, a high signal detection gain can be obtained.
FIG. 4 shows an example of a trellis available with a code word of for example 10 bits in the case that data is encoded in the condition that the range of the variation of the ADS is limited to up to eight. However, in a code word sequence generated with the trellis shown in FIG. 4, the length of an unsettled sequence is not sufficiently decreased. Thus, as described above, there is a probability of which the memory of the Viterbi decoder overflows. Thus, the encoding process should be performed with more restrictions.
For example, when a method for shifting the encoding state at the boundary (length) of a code word is used as shown in FIG. 5, with a path memory whose length is around four times larger than the length of a code word, the memory can be prevented from overflowing. In the conventional 8/10 encoding process of which an information word of eight bits is converted into a code word of 10 bits, the encoding state is shifted. In such an encoding process, the range of the variation of the ADS is limited to up to eight. In addition, a sequence of the Viterbi decoding circuit can be settled.
Conventionally, in the 8/10 encoding process with low encoding ratio, an encoding method with the above-described conditions is used so as to prevent the memory of the Viterbi decoder from overflowing and to improve the signal detection gain. In such an encoding method, to increase the transmission rate of user data, the channel line density should be increased. However, as the channel line density increases, the inter-code interference increases. Thus, the characteristics of the reproduced signal remarkably deteriorate.
On the other hand, when the channel line density is the same as that of another encoding method, the transmission rate of user data decreases. When such an encoding method with low transmission rate of user data is applied to a magnetic recording/reproducing apparatus or the like, the record capacitance of user data decreases.
An object of the present invention is to provide an encoding circuit, an encoding method, a digital signal transmitting apparatus, and a digital signal recording/reproducing apparatus that allow the transmission rate of user data to improve without need to increase the channel line density or with suppressing the necessity of the increase of the channel line density.
A first aspect of the present invention is an encoding circuit for performing a channel encoding process that is a combination of a partial response and a maximum-likelihood decoding process, comprising a means for converting a binary data sequence of 16-bit information words into a binary data sequence of 18-bit code words in the conditions that the range of variation of ADS of the code word sequence is limited to up to 10, that a quasi catastrophic sequence is removed, and that the maximum zero run length of the code word sequence is limited to up to 10.
A second aspect of the present invention is an encoding circuit for performing a channel encoding process that is a combination of a partial response and a maximum-likelihood decoding process, comprising a means for converting a 16-bit information word of a binary data sequence into a 18-bit code word of a binary data sequence so that the 18-bit code word is generated as a combination of 9-bit sub-code words composed of a binary data sequence, a means for defining a set of 9-bit sub-code words, a combination information generating means for converting a 16-bit information word of a binary data sequence into combination information that represents a combination of sub-code words of the set, a sub-code word generating means, having storing means for storing the set of sub-code words, for selecting two sub-code words from the set stored in the storing means corresponding to the combination information and for outputting the selected sub-code words, and a code word generating means for generating the code word corresponding to output data of the sub-code word generating means.
A third aspect of the present invention is an encoding method for performing a channel encoding process that is a combination of a partial response and a maximum-likelihood decoding process, comprising the step of converting a binary data sequence of 16-bit information words into a binary data sequence of 18-bit code words in the conditions that the range of variation of ADS of the code word sequence is limited to up to 10, that a quasi catastrophic sequence is removed, and that the maximum zero run length of the code word sequence is limited to up to 10.
A fourth aspect of the present invention is a digital signal transmitting apparatus having an encoding circuit for performing a channel encoding process that is a combination of a partial response and a maximum-likelihood decoding process, wherein the encoding circuit comprises a means for converting a binary data sequence of 16-bit information words into a binary data sequence of 18-bit code words in the conditions that the range of variation of ADS of the code word sequence is limited to up to 10, that a quasi catastrophic sequence is removed, and that the maximum zero run length of the code word sequence is limited to up to 10.
A fifth aspect of the present invention is a digital signal recording/reproducing apparatus having an encoding circuit for performing a channel encoding process that is a combination of a partial response and a maximum-likelihood decoding process, wherein the encoding circuit comprises a means for converting a binary data sequence of 16-bit information words into a binary data sequence of 18-bit code words in the conditions that the range of variation of ADS of the code word sequence is limited to up to 10, that a quasi catastrophic sequence is removed, and that the maximum zero run length of the code word sequence is limited to up to 10.
According to the first to fourth aspects of the present invention, since a 16/18 encoding process that has higher encoding ratio than the conventional 8/10 encoding process is performed with conditions of which a memory of a Viterbi decoder is prevented from overflowing and of which a signal detection gain is improved, the Viterbi decoding process can be properly performed. In addition, the transmission rate can be improved without need to improve the channel line density.
In addition, since a code of which the zero run length is limited to up to 10, a clock signal can be stably reproduced from a reproduction signal.
According to the present invention, a 16-bit information word is converted into a 18-bit code word. Moreover, since the 18-bit code word is represented with a combination of 9-bit sub-code words, the hardware scale necessary for generating a 18-bit code word corresponding to a 16-bit information word can be reduced.
According to the fifth aspect of the present invention, the storage capacity for user data can be increased in comparison with the conventional encoder using codes having low encoding ratio such as 8/10 codes without need to improve the channel line density.
These and other objects, features and advantages of the present invention will become more apparent in light of the following detailed description of a best mode embodiment thereof, as illustrated in the accompanying drawings.